A Fully-Digital Realtime SoC FPGA based Phase Noise Analyzer with Cross-Correlation
| Affiliation auteurs | !!!! Error affiliation !!!! |
| Titre | A Fully-Digital Realtime SoC FPGA based Phase Noise Analyzer with Cross-Correlation |
| Type de publication | Conference Paper |
| Year of Publication | 2017 |
| Auteurs | Bourgeois P.-Y, Goavec-Merou G., Friedt J.-M, Rubiola E. |
| Conference Name | 2017 JOINT CONFERENCE OF THE EUROPEAN FREQUENCY AND TIME FORUM AND IEEE INTERNATIONAL FREQUENCY CONTROL SYMPOSIUM (EFTF/IFC) |
| Publisher | IEEE |
| Conference Location | 345 E 47TH ST, NEW YORK, NY 10017 USA |
| ISBN Number | 978-1-5386-2916-1 |
| Résumé | We report on a fully-digital and realtime operation of a phase noise analyzer using modern digital techniques with cross-correlation. With the advent of system on chip field-programmable gate arrays (SoC FPGAs) embedding hard core central processing unit, coprocessor and FPGA onto a single integrated circuit, the building of sensitive analysis devices for Time & Frequency research is made accessible at virtually no cost and benefits from reconfigurability. Used with high-speed digitizers we have successfully implemented a four-channel system whose preliminary results at 10 MHz shows a residual white noise floor < -185 dBrad(2)/Hz up to 5 MHz off the carrier, and flicker < -127 dBrad(2)/Hz using cross-correlation. |