Second-Order Sliding-Mode MRAS Observer-Based Sensorless Vector Control of Linear Induction Motor Drives for Medium-Low Speed Maglev Applications

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TitreSecond-Order Sliding-Mode MRAS Observer-Based Sensorless Vector Control of Linear Induction Motor Drives for Medium-Low Speed Maglev Applications
Type de publicationJournal Article
Year of Publication2018
AuteursWang H, Ge X, Liu Y-C
JournalIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Volume65
Pagination9938-9952
Date PublishedDEC
Type of ArticleArticle
ISSN0278-0046
Mots-clésDynamic end effect, linear induction motor (LIM), medium-low speed maglev, model reference adaptive system (MRAS), second-order sliding-mode observer, speed-sensorless drive system
Résumé

This paper presents a speed estimation scheme by combining a second-order sliding-mode observer (SMO) with the model reference adaptive system (MRAS) in the sensorless-vector-controlled linear induction motor (LIM) drives for medium-low speed maglev applications. A state space-vector model of the LIM considering the dynamic end effects is rearranged in order to be represented by the form of the super-twisting algorithm (STA). Then, an STA-SMO-based stator current observer of the LIM with Popov's hyperstability theory is designed, which is used to replace the reference model of the MRAS-based scheme. Correspondingly, the actual stator current model is regarded as the adaptive model of the MRAS for speed estimation. Meanwhile, because the variation of stator resistance associated with stator temperature may lead to a large estimated error and even system instability, a parallel stator resistance on-line identification scheme is adopted in the proposed speed estimation scheme to reduce the speed error and improve the stability of the sensorless control system. Compared to the speed estimation schemes based on the Luerberger observer with MRAS and the single-manifold SMO, the proposed speed estimation scheme exhibits better estimated performance. The effectiveness and feasibility of the proposed speed estimation scheme have been verified by simulation and hardware-in-the-loop tests.

DOI10.1109/TIE.2018.2818664