Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses

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TitreSurvey on hardware implementation of random number generators on FPGA: Theory and experimental analyses
Type de publicationJournal Article
Year of Publication2018
AuteursBakiri M, Guyeux C, Couchot J-F, Oudjida AKamel
JournalCOMPUTER SCIENCE REVIEW
Volume27
Pagination135-153
Date PublishedFEB
Type of ArticleReview
ISSN1574-0137
Mots-clésApplied cryptography, chaos, Field-Programmable Gate Array, Hardware Security, Physical security, Random number generators
Résumé

Random number generation refers to many applications such as simulation, numerical analysis, cryptography etc. Field Programmable Gate Array (FPGA) are reconfigurable hardware systems, which allow rapid prototyping. This research work is the first comprehensive survey on how random number generators are implemented on Field Programmable Gate Arrays (FPGAs). A rich and up-to-date list of generators specifically mapped to FPGA are presented with deep technical details on their definitions and implementations. A classification of these generators is presented, which encompasses linear and nonlinear (chaotic) pseudo and truly random number generators. A statistical comparison through standard batteries of tests, as well as implementation comparison based on speed and area performances, are finally presented. (C) 2018 Elsevier Inc. All rights reserved.

DOI10.1016/j.cosrev.2018.01.002