Two modified SVPWM algorithms for common-mode voltage reduction in eight-switch three-phase inverters

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TitreTwo modified SVPWM algorithms for common-mode voltage reduction in eight-switch three-phase inverters
Type de publicationJournal Article
Year of Publication2017
AuteursLiu Y-C, Ge X, Tang Q, Gou B
JournalELECTRONICS LETTERS
Volume53
Pagination676-677
Date PublishedMAY 11
Type of ArticleArticle
ISSN0013-5194
Résumé

The relationship between common-mode voltages (CMVs) and switching states in the post-fault reconfigured topology of the three-level neutral-point-clamped inverter with open-circuit fault in a leg, which is named eight-switch three-phase inverter (ESTPI), is revealed, and based on that, two modified space vector pulse-width modulation (M-SVPWM) algorithms for the CMV reduction in the ESTPI are proposed. The maximum CMV of the ESTPI with two proposed M-SVPWM algorithms is only half of that with two conventional SVPWM algorithms. Experimental results have shown the effectiveness of two proposed M-SVPWM algorithms.

DOI10.1049/el.2017.0678